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CA3410 Supplier, CA3410 on Stock |
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| CA3410 CA3410 PDF Copyright © 2001 SigmaTel, Inc. All rights reserved. All contents of this document are protected by copyright law and may not be reproduced without the express written consent of SigmaTel, Inc. SigmaTel, the SigmaTel logo, and combinations thereof are trademarks of SigmaTel, Inc. Other product names used in this publication are for identification purposes only and may be trademarks or registered trademarks of their respective companies. The contents of this document are provided in connection with SigmaTel, Inc. products. SigmaTel, Inc. has made best efforts to ensure that the information contained herein is accurate and reliable. However, SigmaTel, Inc. makes no warranties, express or implied, as to the accuracy or com- pleteness of the contents of this publication and is providing this publication "AS IS". SigmaTel, Inc. reserves the right to make changes to specifications and product descriptions at any time without notice, and to discontinue or make changes to its products at any time without notice. SigmaTel, Inc. does not assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential, or incidential damages. CA3410 Datasheet +24VDC unregulated (2) 0C to 40C Option A (with heatsink): Air cooled (3) Option B (without heatsink): Cold plate capable of dissipating ~75W at 125A output current (1) Option A: 6 x 8 x 2.7 (15.2cm x 20.3cm x 6.9cm) Option B: 6.25 x 8 x 1.5 (15.9cm x 20.3cm x 3.8cm) CA3410 Suppliers Internal debounce circuitry prevents inadvertent switch- ing of the wiper position if PU or PD remain LOW for less than 40ms, typical. Each of the buttons can be pushed either once for a single increment/decrement or continu- ously for a multiple increments/decrements. The num- ber of increments/decrements of the wiper position depend on how long the button is being pushed. When The Intersil HSP45116 combines a high performance quadrature Numerically Controlled Oscillator (NCO) and a high speed 16-bit Complex Multiplier/Accumulator (CMAC) on a single IC. This combination of functions allows a complex vector to be multiplied by the internally generated (cos, sin) vector for quadrature modulation and demodulation. As shown in the Block Diagram, the HSP45116 is divided into three main sections. The Phase/Frequency Control Section (PFCS) and the Sine/Cosine Section together form a complex NCO. The CMAC multiplies the output of the Sine/ Cosine Section with an external complex vector. The peak primary current can be computed from the turns ratios established for the transformer along with the ripple current in the output inductors. This allows selection of the appropriate TOPSwitch-GX. It must have sufficient current limit to handle the maximum steady-state load and must have enough additional margin to accommodate peak loads and transients. Another consideration in the selection of the TOPSwitch-GX is power dissipation in the device. A device that can handle the steady-state and peak primary currents does not guarantee ability to meet thermal limitations C this is an independent consideration. Figures 2a and 2b show the recommended circuits to simulate charging and discharging. The Li+ cell is connected between the BAT+ and BAT- pads. The battery charger/power supply or circuit load is connected between the PAC+ and PAC- pads. The evaluation software can be run in either configuration as long as a cell is connected between the BAT+ and BAT- terminals providing a minimum of 2.5V to power the DS2720. Refer to the datasheet for the operation of the PS pin. Leaving it unconnected does not interfere with the operation of the demonstration board. FUNCTIONAL DESCRIPTION The STLC3065 is a device specifically developed for WLL application. It is based on a SLIC core, on purpose optimised for this application, with the addition of a DC/DC converter controller and a dual port in order to ful- fil the WLL requirements. The SLIC core performs the standard feeding, signalling and transmission functions. It can be set in three different operating modes via the D0, D1, D2 pins of the control logic inter- face (0 to 3.3V logic levels). The loop status is carried out on the DET pin (active low).The DET pin is an open drain output to allow easy interfac- ing with both 3.3V and 5V logic levels. The three possible SLIC core operating modes are: Power Down (PWD) |
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