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CA3401G Supplier, CA3401G on Stock |
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| CA3401G CA3401G PDF access for a read or program can begin. The typical num- ber of program and erase cycles is in excess of 10,000 cycles. The optional 16K bytes boot block section includes a repro- gramming write lock out feature to provide data integrity. The boot sector is designed to contain user secure code, and when the feature is enabled, the boot sector is perma- nently protected from being reprogrammed. CA3401G Datasheet Hynix HYMD564M646(L)6-K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer. CA3401G Suppliers Encoding Standard Pin. A Logic HIGH signal is used for NTSC encoding, a Logic LOW signal signifies PAL. When SA is high, phase alternation accompanies NTSC bandwidths and timing for support of PAL (M) and combination N standards used in South America. Chip Enable. A Logic HIGH input enables the encode function. A Logic LOW input powers down the chip when not in use. Requires active HSYNC signal to activate. Can be raised briefly to perform power-down load check. Terminate. A Logic HIGH enables terminate function. RT, GT, and BT terminals are tied to the termination ground, TGND. A Logic Low leaves these terminals floating. Red Component Video Input. 0 mV to 714 mV ac-coupled. Green Component Video Input. 0 mV to 714 mV ac-coupled. Blue Component Video Input. 0 mV to 714 mV ac-coupled. Analog Ground Connection. (Main Ground Connection.) Input Terminal for RED Termination Switch. Can be left unconnected when switchable input termination option is not used. Input Terminal for GREEN Termination Switch. Can be left unconnected when switchable input termination option is not used. Input Terminal for BLUE Termination Switch. Can be left unconnected when switchable input termination option is not used. Termination Switch Ground Connection. Digital Positive Supply Connection. Digital Ground Connection. Horizontal Sync Signal (or CSYNC signal). Vertical Sync Signal. 4FSC Clock Input. For NTSC: 14.318 180 MHz, for PAL: 17.734 475 MHz. Output Flag for TV Presence Detection. LOW signal signifies no TV present. Composite Video Gain Setting Resistor. Composite Video Output. Luminance Trap Filter Tap. Attach L-C resonant network to reduce cross-color artifacts. Analog Positive Supply Connection. Chrominance Output. Chrominance Gain Setting Resistor. Analog Positive Supply Connection. Luminance Output (with CSYNC). Luminance Gain Setting Resistor. Analog Ground Connection. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Encoded speech data is transferred at 20 ms intervals in blocks of 260 bits plus the Bad Frame Indicator (BFI). The speech decoder supports a Comfort Noise Insertion (CNI) function that inserts a predefined silence descriptor into the decoding process. The GSMP also implements control of talker side-tone and short term echo cancellation. The resulting data, at 104 kb/s, is transferred to the VBC through a dedicated serial path. Supply Voltage (VCC) CMOS/TTL Input Voltage CMOS/TTL Ouput Voltage LVDS Receiver Input Voltage LVDS Receiver Input Voltage LVDS Output Short Circuit Duration Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 4 sec.) VSENSE: This pin is the inverting input of the voltage amplifier and serves as the output voltage feedback point for the PFC boost converter. It senses the output voltage through a voltage divider which produces a nominal 3V. The voltage loop compensation is normally connected between this pin and VAO. The VSENSE pin must be above 1.5V at 25C, (1.9V at C55C) for the current syn- thesizer to work properly. |
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